Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 11 MOTOR CONTROL FUNCTION
R01UH0042EJ0500 Rev.5.00 Page 618 of 1513
Aug 12, 2011
The transfer timing in Figure 11-28 is at the point where the crest timing occurs. While the 16-bit counter is
counting down, the cycle changes and an asymmetrical triangular wave is output. Because the cycle changes,
rewrite the duty factor (voltage data value).
Figure 11-28. Example of Rewriting TAB1CCR0 Register (During Counting Up)
(a) M > N
16-bit
counter
Transfer
timing
CCR0 buffer
register
TAB1CCR0
register
TAB1CCR1
register
CCR1 buffer
register
TOAB1T1
pin output
INTTAB1CC0
signal
INTTAB1OV
signal
kk
k
k
i
k
k
N + 1
N + 1
N
N
M
M
0000H
0000H
M
i
i
k
k
(b) M < N
16-bit
counter
Transfer
timing
CCR0 buffer
register
TAB1CCR0
register
TAB1CCR1
register
CCR1 buffer
register
TOAB1T1
pin output
INTTAB1CC0
signal
INTTAB1OV
signal
kk
i
N + 1
N + 1
N
N
M
M
0000H
0000H
M
i
i
k
k
Remarks 1. If transfer (match between the value of the 16-bit counter and the value of the CCR0 buffer
register) occurs in the 6-phase PWM output mode, the value of the TAB1CCR0 register plus 1 is
loaded to the 16-bit counter. In this way, the expected wave can be output even if the cycle value
is changed at the transfer timing of the crest (match between the 16-bit counter value and the
TAB1CCR0 register value) timing.
2. M: Value of CCR0 buffer register before rewriting
N: Value of CCR0 buffer register after rewriting