Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 11 MOTOR CONTROL FUNCTION

R01UH0042EJ0500 Rev.5.00 Page 614 of 1513

Aug 12, 2011

Figure 11-25. Example of Rewriting TAB1CCR1 to TAB1CCR3 Registers (Rewriting After Match Occurs)

CCRm buffer

16-bit

counter

TAB1CCRm

INTTAB1CCm

signal

TOAB1Tm

pin output

<1>

<3>

<2>

<1> Matching of the count value of the 16-bit counter and the value of the TAB1CCRm register as a result of

rewriting the register is ignored after a match signal has been generated, and the PWM output does not

change.

<2> Even if the PWM output does not change, the interrupt generated upon a match between the 16-bit

counter value and the TAB1CCRm register value (INTTAB1CCm) is output.

<3> The next match between the 16-bit counter and TAB1CCRm register is valid after the counter has changed

its counting direction to up or down, and the PWM output changes.

If the TAB1CCRm register is rewritten after its value matches the value of the 16-bit counter, the next match is

ignored after the first match occurs and the rewritten value is not reflected in the TOAB1Tm pin output. If the

down is valid (the match that occurs after the counter has started counting up is valid if the register is rewritten

while the counter is counting up).

Remarks 1. i, r, k = Set value of TAB1CCRm register

2. m = 1 to 3

The interrupt culling counter is cleared when the TAB1OPT1 register is written. When the interrupt culling

counter has been cleared, the measured number of times the interrupt has occurred is discarded.

Consequently, the interrupt generation interval is temporarily extended.

To avoid this operation, rewrite the TAB1OPT1 register in the intermittent batch rewrite mode (transfer culling

mode).

For details of rewriting the TAB1OPT1 register, see 11.4.3 Interrupt culling function.