Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 11 MOTOR CONTROL FUNCTION
R01UH0042EJ0500 Rev.5.00 Page 581 of 1513
Aug 12, 2011
11.3 Control Registers
(1) TAB1 option register 1 (TAB1OPT1)
The TAB1OPT1 register is an 8-bit register that controls the interrupt request signal generated by the timer Q option
function.
This register can be rewritten when the TAB1CTL0.TAB1CE bit is 1.
Two rewrite modes (batch write mode and anytime write mode) can be selected, depending on the setting of the
TAB1OPT0.TAB1CMS bit.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
TAB1ICE
TAB1ICE
0
1
Crest interrupt (INTTAB1CC0 signal) enable
Do not use INTTAB1CC0 signal (do not use it as count signal for interrupt
culling).
Use INTTAB1CC0 signal (use it as count signal for interrupt culling).
TAB1OPT1 TAB1IOE 0 TAB1ID4 TAB1ID3 TAB1ID2 TAB1ID1 TAB1ID0
<6>54 32 1
TAB1IOE
0
1
Valley interrupt (INTTAB1OV signal) enable
Do not use INTTAB1OV signal (do not use it as count signal for interrupt
culling).
Use INTTAB1OV signal (use it as count signal for interrupt culling).
After reset: 00H R/W Address: FFFFF580H
<7> 0
Not culled (all interrupts are output)
1 masked (one of two interrupts is output)
2 masked (one of three interrupts is output)
3 masked (one of four interrupts is output)
:
28 masked (one of 29 interrupts is output)
29 masked (one of 30 interrupts is output)
30 masked (one of 31 interrupts is output)
31 masked (one of 32 interrupts is output)
TAB1ID4
0
0
0
0
:
1
1
1
1
Number of times of interrupt
TAB1ID3
0
0
0
0
:
1
1
1
1
TAB1ID2
0
0
0
0
:
1
1
1
1
TAB1ID1
0
0
1
1
:
0
0
1
1
TAB1ID0
0
1
0
1
:
0
1
0
1