Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 9 16-BIT TIMER/EVENT COUNTER T (TMT)
R01UH0042EJ0500 Rev.5.00 Page 549 of 1513
Aug 12, 2011
<3> TT0LDE bit: Transfer function of the set value of the TT0CCR0 register to the 16-bit counter when the
counter underflows
When the TT0LDE bit = 1, the set value of the TT0CCR0 register can be transferred to the 16-bit counter
when the counter underflows.
The TT0LDE bit is valid only in the encoder compare mode.
• Count operation in range from 0000H to set value of the TT0CCR0 register
If the 16-bit counter performs a count operation when the TT0LDE bit = 1 and TT0ECM1 and TT0ECM0
bits = 01, and when the count value of the counter matches the set value of the CCR0 buffer register
when the TT0ECM0 bit = 1, the 16-bit counter is cleared to 0000H if the next count operation is
counting up.
If the 16-bit counter underflows when the TT0LDE bit = 1, the set value of the TT0CCR0 register is
transferred to the counter.
Therefore, the counter can operate in a range from 0000H to the set value of the TT0CCR0 register in
which the upper-limit count value is the set value of the TT0CCR0 register and the lower-limit value is
0000H.
Figure 9-51. Operation Example (Count Operation in Range from 0000H to Set Value of TT0CCR0 Register)
16-bit counter is
cleared to 0000H.
Set value of TT0CCR0 register
is transferred to 16-bit counter.
16-bit counter
underflows.
Count up Count down
Count value of 16-bit counter
matches value of CCR0 buffer register.
16-bit counter
Set value of TT0CCR0 register (N)
0000H