Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 9 16-BIT TIMER/EVENT COUNTER T (TMT)
R01UH0042EJ0500 Rev.5.00 Page 548 of 1513
Aug 12, 2011
<2> TT0ECM1 and TT0ECM0 bits: Timer/counter clear function upon match of the compare register
The 16-bit counter performs its count operation in accordance with the set value of the TT0ECM1 and
TT0ECM0 bits when the count value of the counter matches the value of the CCRn buffer register.
• When TT0ECM1 and TT0ECM0 bits = 00
The 16-bit counter is not cleared when its count value matches the value of the CCRn buffer register.
• When TT0ECM1 and TT0ECM0 bits = 01
The 16-bit counter performs a count operation under the following condition when its count value
matches the value of the CCR0 buffer register.
Next Count Operation Description
Count up 16-bit counter is cleared to 0000H.
Count down Count value of 16-bit counter is counted down.
• When TT0ECM1 and TT0ECM0 bits = 10
The 16-bit counter performs a count operation under the following condition when its count value
matches the value of the CCR1 buffer register.
Next Count Operation Description
Count up Count value of 16-bit counter is counted up.
Count down 16-bit counter is cleared to 0000H.
• When TT0ECM1 and TT0ECM0 bits = 11
The 16-bit counter performs a count operation under the following condition when its count value
matches the value of the CCR0 buffer register.
Next Count Operation Description
Count up 16-bit counter is cleared to 0000H.
Count down Count value of 16-bit counter is counted down.
The 16-bit counter performs a count operation under the following condition when its count value
matches the value of the CCR1 buffer register.
Next Count Operation Description
Count up Count value of 16-bit counter is counted up.
Count down 16-bit counter is cleared to 0000H.