Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 9 16-BIT TIMER/EVENT COUNTER T (TMT)
R01UH0042EJ0500 Rev.5.00 Page 538 of 1513
Aug 12, 2011
(1) Operation flow in pulse width measurement mode
Figure 9-42. Software Processing Flow in Pulse Width Measurement Mode
<1> <2>
TT0CE bit = 1
TT0CE bit = 0
Register initial setting
TT0CTL0 register
(TT0CKS0 to TT0CKS2 bits),
TT0CTL1 register,
TT0IOC1 register,
TT0IOC2 register,
TT0OPT0 register
Initial setting of these registers
is performed before setting the
TT0CE bit to 1.
The TT0CKS0 to TT0CKS2 bits can
be set at the same time as when counting
starts (TT0CE bit = 1).
The counter is initialized and counting
is stopped by clearing the TT0CE bit to 0.
START
STOP
<1> Count operation start flow
<2> Count operation stop flow
FFFFH
16-bit counter
0000H
TT0CE bit
TIT00 pin input
TT0CCR0 register
INTTT0CC0 signal
D00000H 0000HD1 D2