Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 9 16-BIT TIMER/EVENT COUNTER T (TMT)
R01UH0042EJ0500 Rev.5.00 Page 537 of 1513
Aug 12, 2011
Figure 9-41. Register Setting in Pulse Width Measurement Mode (2/2)
(e) TMT0 option register 0 (TT0OPT0)
00000
TT0OPT0
Overflow flag
0 0 0/1
TT0CCS0 TT0OVF TT0CCS1
(f) TMT0 counter read buffer register (TT0CNT)
The value of the 16-bit counter can be read by reading the TT0CNT register.
(g) TMT0 capture/compare registers 0 and 1 (TT0CCR0 and TT0CCR1)
These registers store the count value of the 16-bit counter when the valid edge input to the TIT00 and
TIT01 pins is detected.
Remark TMT0 control register 2 (TT0CTL2), TMT0 I/O control register 0 (TT0IOC0), TMT0 I/O control
register 3 (TT0IOC3), TMT0 option register 1 (TT0OPT1), and TMT0 counter write register
(TT0TCW) are not used in the pulse width measurement mode.