Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 9 16-BIT TIMER/EVENT COUNTER T (TMT)
R01UH0042EJ0500 Rev.5.00 Page 530 of 1513
Aug 12, 2011
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Example when two capture registers are used (using overflow interrupt)
FFFFH
16-bit counter
0000H
TT0CE bit
INTTT0OV signal
TT0OVF bit
TT0OVF0 flag
Note
TIT00 pin input
TT0CCR0 register
TT0OVF1 flag
Note
TIT01 pin input
TT0CCR1 register
D 10
D 11
D 00
D 01
D 10
<1> <2> <5> <6><3> <4>
D 00
D 11
D 01
Note The TT0OVF0 and TT0OVF1 flags are set on the internal RAM by software.
<1> Read the TT0CCR0 register (setting of the default value of the TIT00 pin input).
<2> Read the TT0CCR1 register (setting of the default value of the TIT01 pin input).
<3> An overflow occurs. Set the TT0OVF0 and TT0OVF1 flags to 1 in the overflow interrupt servicing,
and clear the overflow flag to 0.
<4> Read the TT0CCR0 register.
Read the TT0OVF0 flag. If the TT0OVF0 flag is 1, clear it to 0.
Because the TT0OVF0 flag is 1, the pulse width can be calculated by (10000H + D
01 − D00).
<5> Read the TT0CCR1 register.
Read the TT0OVF1 flag. If the TT0OVF1 flag is 1, clear it to 0 (the TT0OVF0 flag is cleared in
<4>, and the TT0OVF1 flag remains 1).
Because the TT0OVF1 flag is 1, the pulse width can be calculated by (10000H + D
11 − D10)
(correct).
<6> Same as <3>