Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 9 16-BIT TIMER/EVENT COUNTER T (TMT)
R01UH0042EJ0500 Rev.5.00 Page 525 of 1513
Aug 12, 2011
(b) When using capture/compare register as capture register
Figure 9-38. Software Processing Flow in Free-Running Timer Mode (Capture Function) (1/2)
FFFFH
16-bit counter
0000H
TT0CE bit
TIT00 pin input
TT0CCR0 register
INTTT0CC0 signal
TIT01 pin input
TT0CCR1 register
INTTT0CC1 signal
INTTT0OV signal
TT0OVF bit
D 00 0000 0000D 01 D 02 D 03
D 10
D 00
D 01
D 02
D 03
D 11
D 12
D 10 0000 D 11 D 12 0000
Cleared to 0 by
CLR instruction
Cleared to 0 by
CLR instruction
<3><1>
<2> <2>