Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 9 16-BIT TIMER/EVENT COUNTER T (TMT)
R01UH0042EJ0500 Rev.5.00 Page 513 of 1513
Aug 12, 2011
(1) Operation flow in PWM output mode
Figure 9-32. Software Processing Flow in PWM Output Mode (1/2)
FFFFH
16-bit counter
0000H
TT0CE bit
TT0CCR0 register
CCR0 buffer register
INTTT0CC0 signal
TOT00 pin output
TT0CCR1 register
CCR1 buffer register
INTTT0CC1 signal
TOT01 pin output
D 10
D 00
D 00 D 01 D 00
D 00
D 10 D 10 D 11 D 10
D 10 D 10 D 11 D 10
D 01 D 00
D 10 D 10
D 00
D 10
D 00 D 11 D 11
D 01 D 01 D 01
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