Datasheet
V850ES/JG3-H, V850ES/JH3-H CHAPTER 9 16-BIT TIMER/EVENT COUNTER T (TMT)
R01UH0042EJ0500 Rev.5.00 Page 500 of 1513
Aug 12, 2011
(d) Conflict between trigger detection and match with CCR0 buffer register
If the trigger is detected immediately after the INTTT0CC0 signal is generated, the 16-bit counter is cleared to
0000H and continues counting up again from that point. Therefore, the active period of the TOT01 pin is
extended by the time from generation of the INTTT0CC0 signal to trigger detection.
16-bit counter
CCR0 buffer register
INTTT0CC0 signal
TOT01 pin output
External trigger input
(EVTT0 pin input)
D0
D0 − 1D00000FFFF 0000 0000
Extended
If the trigger is detected immediately before the INTTT0CC0 signal is generated, the INTTT0CC0 signal is not
generated. The 16-bit counter is cleared to 0000H, the TOT01 pin is asserted, and the counter continues
counting. Consequently, the inactive period of the PWM waveform is shortened.
16-bit counter
CCR0 buffer register
INTTT0CC0 signal
TOT01 pin output
External trigger input
(EVTT0 pin input)
D
0
D
0
− 1D
0
0000FFFF 0000 0001
Shortened