Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 9 16-BIT TIMER/EVENT COUNTER T (TMT)
R01UH0042EJ0500 Rev.5.00 Page 499 of 1513
Aug 12, 2011
(c) Conflict between trigger detection and match with CCR1 buffer register
If the trigger is detected immediately after the INTTT0CC1 signal is generated, the 16-bit counter is
immediately cleared to 0000H, the TOT01 pin is asserted, and the counter continues counting. Consequently,
the inactive period of the PWM waveform is shortened.
16-bit counter
CCR1 buffer register
INTTT0CC1 signal
TOT01 pin output
External trigger input
(EVTT0 pin input)
D 1
D 1 − 10000FFFF 0000
Shortened
If the trigger is detected immediately before the INTTT0CC1 signal is generated, the INTTT0CC1 signal is not
generated, and the 16-bit counter is cleared to 0000H and continues counting. The output signal of the TOT01
pin remains active. Consequently, the active period of the PWM waveform is extended.
16-bit counter
CCR1 buffer register
INTTT0CC1 signal
TOT01 pin output
External trigger input
(EVTT0 pin input)
D 1
D 1 − 2D 1 − 1D 1 0000FFFF 0000 0001
Extended