Datasheet
V850ES/JG3-H, V850ES/JH3-H CHAPTER 9 16-BIT TIMER/EVENT COUNTER T (TMT)
R01UH0042EJ0500 Rev.5.00 Page 486 of 1513
Aug 12, 2011
(d) Notes on rewriting TT0CCR0 register
If the value of the TT0CCR0 register is rewritten to a smaller value during counting, the 16-bit counter may
overflow. When an overflow may occur, stop counting once and then change the set value.
FFFFH
16-bit counter
0000H
TT0CE bit
TT0CCR0 register
INTTT0CC0 signal
D
1
D
2
D
1
D
1
D
2
D
2
D
2
External event
count (1):
(D
1
+ 1)
External event count (NG):
(10000H + D
2
+ 1)
External event
count (2):
(D
2
+ 1)
If the value of the TT0CCR0 register is changed from D
1 to D2 while the count value is greater than D2 but less
than D
1, the count value is transferred to the CCR0 buffer register as soon as the TT0CCR0 register has been
rewritten. Consequently, the value that is compared with the 16-bit counter is D2.
Because the count value has already exceeded D
2, however, the 16-bit counter counts up to FFFFH, overflows,
and then counts up again from 0000H. When the count value matches D
2, the INTTT0CC0 signal is generated.
Therefore, the INTTT0CC0 signal may not be generated at the valid edge count of “(D1 + 1) times” or “(D2 + 1)
times” as originally expected, but may be generated at the valid edge count of “(10000H + D
2 + 1) times”.