Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 9 16-BIT TIMER/EVENT COUNTER T (TMT)
R01UH0042EJ0500 Rev.5.00 Page 480 of 1513
Aug 12, 2011
Figure 9-15. Basic Timing in External Event Count Mode
FFFFH
16-bit counter
0000H
TT0CE bit
TT0CCR0 register
INTTT0CC0 signal
D 0
D 0 D 0 D 0
16-bit counter
TT0CCR0 register
INTTT0CC0 signal
External event
count input
(EVTT0 pin input)
D 0
External
event
count
(D
0 + 1)
External
event
count
(D
0 + 1)
External
event
count
(D
0 + 1)
D 0 − 1D 0 0000 0001
Remark This figure shows the basic timing when the rising edge is specified as the valid edge of the
external event count input.