Datasheet
V850ES/JG3-H, V850ES/JH3-H CHAPTER 9 16-BIT TIMER/EVENT COUNTER T (TMT)
R01UH0042EJ0500 Rev.5.00 Page 467 of 1513
Aug 12, 2011
Figure 9-5. Flowchart of Basic Operation for Batch Write
START
Initial settings
• Set values to TT0CCRn register
• Timer operation enable (TT0CE
bit = 1)
→ Transfer values of TT0CCRn
register to CCRn buffer
register
Timer operation
• Match between 16-bit counter
and CCR1 buffer register
Note
• Match between 16-bit counter
and CCR0 buffer register
• 16-bit counter clear & start
• Transfer of values of TT0CCRn
register to CCRn buffer register
INTTT0CC1 signal output
TT0CCR0 register rewrite
TT0CCR1 register rewrite
INTTT0CC0 signal output
Batch write enable
Note The 16-bit counter is not cleared upon a match between the 16-bit counter value and the CCR1
buffer register value. It is cleared upon a match between the 16-bit counter value and the CCR0
buffer register value.
Caution Writing to the TT0CCR1 register includes enabling of batch write. Thus, rewrite the
TT0CCR1 register after rewriting the TT0CCR0 register.
Remark The above flowchart illustrates an example of the operation in the PWM output mode.