Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 9 16-BIT TIMER/EVENT COUNTER T (TMT)
R01UH0042EJ0500 Rev.5.00 Page 447 of 1513
Aug 12, 2011
(6) TMT0 I/O control register 2 (TT0IOC2)
The TT0IOC2 register is an 8-bit register that controls the valid edge for the external event count input signal
(EVTT0 pin) and external trigger input signal (EVTT0 pin).
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
0
TT0EES1
0
0
1
1
TT0EES0
0
1
0
1
External event count input signal (EVTT0 pin) valid edge setting
No edge detection (external event count invalid)
Detection of rising edge
Detection of falling edge
Detection of both edges
0 0 0 TT0EES1 TT0EES0 TT0ETS1 TT0ETS0
654321
TT0ETS1
0
0
1
1
TT0ETS0
0
1
0
1
External trigger input signal (EVTT0 pin) valid edge setting
No edge detection (external trigger invalid)
Detection of rising edge
Detection of falling edge
Detection of both edges
7 0
TT0IOC2
After reset: 00H R/W Address: FFFFF605H
Cautions 1. Rewrite the TT0EES1, TT0EES0, TT0ETS1, and TT0ETS0 bits when the
TT0CTL0.TT0CE bit = 0. (The same value can be written when the
TT0CE bit = 1.) If rewriting was mistakenly performed, clear the
TT0CE bit to 0 and then set the bits again.
2. The TT0EES1 and TT0EES0 bits are valid only when the
TT0CTL1.TT0EEE bit = 1 or when the external event count mode (the
TT0CTL1.TT0MD3 to TT0CTL1.TT0MD0 bits = 0001) has been set.
3. The TT0ETS1 and TT0ETS0 bits are valid only in the external trigger
pulse mode or one-shot pulse output mode.