Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 9 16-BIT TIMER/EVENT COUNTER T (TMT)
R01UH0042EJ0500 Rev.5.00 Page 440 of 1513
Aug 12, 2011
(2) TMT0 control register 1 (TT0CTL1)
The TT0CTL1 register is an 8-bit register that controls the TMT0 operation.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
(1/2)
0TT0CTL1 TT0EST TT0EEE 0 TT0MD3 TT0MD2 TT0MD1 TT0MD0
654321
After reset: 00H R/W Address:
FFFFF601H
7 0
TT0EST
0
1
Software trigger control
Generates a valid signal for external trigger input.
• In one-shot pulse output mode: A one-shot pulse is output with writing
1 to the TT0EST bit as the trigger.
• In external trigger pulse output mode: A PWM waveform is output with
writing 1 to the TT0EST bit as the trigger.
Disables operation with external event count input (EVTT0 pin).
(Performs counting with the count clock selected by the
TT0CTL0.TT0CKS0 to TT0CTL0.TT0CKS2 bits.)
TT0EEE
0
1
Count clock selection
The TT0EEE bit selects whether counting is performed with the internal count clock
or the valid edge of the external event count input.
Enables operation with external event count input (EVTT0 pin).
(Performs counting at every valid edge of the external event count input
signal (EVTT0 pin).)
−
The read value of the TT0EST bit is always 0.
Interval timer mode
External event count mode
External trigger pulse output mode
One-shot pulse output mode
PWM output mode
Free-running timer mode
Pulse width measurement mode
Triangular-wave PWM output mode
Encoder compare mode
Setting prohibited
Timer mode selection
TT0MD3
0
0
0
0
0
0
0
0
1
Other than above
TT0MD2
0
0
0
0
1
1
1
1
0
TT0MD1
0
0
1
1
0
0
1
1
0
TT0MD0
0
1
0
1
0
1
0
1
0