Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 8 16-BIT TIMER/EVENT COUNTER AB (TAB)
R01UH0042EJ0500 Rev.5.00 Page 409 of 1513
Aug 12, 2011
(1) Operation flow in free-running timer mode
(a) When using capture/compare register as compare register
Figure 8-32. Software Processing Flow in Free-Running Timer Mode (Compare Function) (1/2)
D10
D20
D30
D00
D10
D20
D30
D00
D11
D31
D01
D21 D21
D11
D11
D31
D01
FFFFH
16-bit counter
0000H
TABnCE bit
TABnCCR0 register
INTTABnCC0 signal
TOABn0 pin output
TABnCCR1 register
INTTABnCC1 signal
TOABn1 pin output
TABnCCR2 register
INTTABnCC2 signal
TOABn2 pin output
TABnCCR3 register
INTTABnCC3 signal
TOABn3 pin output
INTTABnOV signal
TABnOVF bit
D00
D10
D20
D30
D01
D11
D21
D31
Cleared to 0 by
CLR instruction
Set value changed
Set value changed
Set value changed
Set value changed
Cleared to 0 by
CLR instruction
Cleared to 0 by
CLR instruction
<3><1>
<2> <2> <2>
Remark n = 0, 1