Datasheet
V850ES/JG3-H, V850ES/JH3-H CHAPTER 8 16-BIT TIMER/EVENT COUNTER AB (TAB)
R01UH0042EJ0500 Rev.5.00 Page 399 of 1513
Aug 12, 2011
(2) PWM output mode operation timing
(a) Changing pulse width during operation
To change the PWM waveform while the counter is operating, write the TABnCCR1 register last.
Rewrite the TABnCCRk register after writing the TABnCCR1 register after the INTTABnCC1 signal is detected.
FFFFH
16-bit counter
0000H
TABnCE bit
D30
D00
D01
D30 D30
D20 D20 D20
D21
D11
D00 D00 D31
D01 D01
D21
D11
D31
TABnCCR0 register
CCR0 buffer register
INTTABnCC0 signal
TABnCCR1 register
CCR1 buffer register
INTTABnCC1 signal
TOABn1 pin output
TABnCCR2 register
CCR2 buffer register
INTTABnCC2 signal
TOABn2 pin output
TABnCCR3 register
CCR3 buffer register
INTTABnCC3 signal
TOABn3 pin output
TOABn0 pin output
D10 D10 D10
D00
D11
D10 D11
D10
D21
D20 D21
D20
D31
D30 D31
D30
D00 D01
Remark n = 0, 1