Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 8 16-BIT TIMER/EVENT COUNTER AB (TAB)
R01UH0042EJ0500 Rev.5.00 Page 366 of 1513
Aug 12, 2011
(b) Notes on rewriting the TABnCCR0 register
To change the value of the TABnCCR0 register to a smaller value, stop counting once and then change the set
value.
If the value of the TABnCCR0 register is rewritten to a smaller value during counting, the 16-bit counter may
overflow.
FFFFH
16-bit counter
0000H
TABnCE bit
TABnCCR0 register
INTTABnCC0 signal
D 1 D 2
D 1 D 1
D 2 D 2 D 2
External event
count signal
interval (1)
(D
1 + 1)
External event count signal
interval (NG)
(10000H + D
2 + 1)
External event
count signal
interval (2)
(D
2 + 1)
Remark n = 0, 1
If the value of the TABnCCR0 register is changed from D
1 to D2 while the count value is greater than D2 but
less than D1, the count value is transferred to the CCR0 buffer register as soon as the TABnCCR0 register has
been rewritten. Consequently, the value that is compared with the 16-bit counter is D
2.
Because the count value has already exceeded D
2, however, the 16-bit counter counts up to FFFFH, overflows,
and then counts up again from 0000H. When the count value matches D2, the INTTABnCC0 signal is
generated.
Therefore, the INTTABnCC0 signal may not be generated at the valid edge count of “(D
1 + 1) times” or “(D2 + 1)
times” originally expected, but may be generated at the valid edge count of “(10000H + D2 + 1) times”.