Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 8 16-BIT TIMER/EVENT COUNTER AB (TAB)
R01UH0042EJ0500 Rev.5.00 Page 359 of 1513
Aug 12, 2011
If the set value of the TABnCCRk register is less than the set value of the TABnCCR0 register, the
INTTABnCCk signal is generated once per cycle. At the same time, the output of the TOABnk pin is inverted.
The TOABnk pin outputs a square wave with the same cycle as that output by the TOABn0 pin.
Remark k = 1 to 3,
n = 0, 1
Figure 8-7. Timing Chart When D
01 ≥ Dk1
D01
D11
D21
D31
D21
D11
D31
D01D01
D21
D11
D31
D01
D21
D11
D31
D01
D21
D11
D31
FFFFH
16-bit counter
0000H
TABnCE bit
TABnCCR0 register
TOABn0 pin output
INTTABnCC0 signal
TABnCCR1 register
TOABn1 pin output
INTTABnCC1 signal
TABnCCR2 register
TOABn2 pin output
INTTABnCC2 signal
TABnCCR3 register
TOABn3 pin output
INTTABnCC3 signal
Remark n = 0, 1