Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 8 16-BIT TIMER/EVENT COUNTER AB (TAB)
R01UH0042EJ0500 Rev.5.00 Page 344 of 1513
Aug 12, 2011
(9) TABn capture/compare register 1 (TABnCCR1)
The TABnCCR1 register can be used as a capture register or a compare register depending on the mode.
This register can be used as a capture register or a compare register only in the free-running timer mode,
according to the setting of the TABnOPT0.TABnCCS1 bit. In the pulse width measurement mode, the TABnCCR1
register can be used only as a capture register. In any other mode, this register can be used only as a compare
register.
The TABnCCR1 register can be read or written during operation.
This register can be read or written in 16-bit units.
Reset sets this register to 0000H.
Caution Accessing the TABnCCR1 register is prohibited in the following statuses. For details, see 3.4.9
(2) Accessing specific on-chip peripheral I/O registers.
• When the CPU operates on the subclock and the main clock oscillation is stopped
• When the CPU operates on the internal oscillation clock
TABnCCR1
(n = 0, 1)
12 10 8 6 4 2
After reset: 0000H R/W Address: TAB0CCR1 FFFFF548H, TAB1CCR1 FFFFF568H
14 0
13 11 9 7 5 3
15 1