Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 8 16-BIT TIMER/EVENT COUNTER AB (TAB)
R01UH0042EJ0500 Rev.5.00 Page 340 of 1513
Aug 12, 2011
(6) TABn I/O control register 4 (TABnIOC4)
The TABnIOC4 register is an 8-bit register that controls the timer output.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H. This register is not reset by stopping the timer operation (TABnCTL0.TABnCE = 0).
Cautions 1. Accessing the TABnIOC4 register is prohibited in the following statuses. For details, see 3.4.9
(2) Accessing specific on-chip peripheral I/O registers.
• When the CPU operates on the subclock and the main clock oscillation is stopped
• When the CPU operates on the internal oscillation clock
2. The TABnIOC4 register can be set only in the interval timer mode and free-running timer mode.
Be sure to set the TABnIOC4 register to 00H in all other modes (for details of the mode setting,
see 8.4 (2) TABn control register 1 (TABnCTL1)). Even in free-running timer mode, if the
TABnCCR0 to TABnCCR3 registers are set to the capture function, the setting of the
TABnIOC4 register becomes invalid.
TABnOS3 TABnIOC4
(n = 0, 1)
TABnOR3 TABnOS2 TABnOR2 TABnOS1 TABnOR1 TABnOS0 TABnOR0
6543217 0
After reset: 00H R/W Address: TAB0IOC4 FFFFF550H, TAB1IOC4 FFFFF570H
TABnOSm
0
0
1
1
TABnORm
0
1
0
1
Toggle control of TOABnm pin (m = 0 to 3)
No request. Normal toggle operation.
Reset request
Fix to inactive level upon next match between value of 16-bit
counter and value of TAAnCCRm register.
Set request
Fix to active level upon next match between value of 16-bit
counter and value of TAAnCCRm register.
Keep request
Keep the current output level.