Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 8 16-BIT TIMER/EVENT COUNTER AB (TAB)
R01UH0042EJ0500 Rev.5.00 Page 337 of 1513
Aug 12, 2011
(3) TABn I/O control register 0 (TABnIOC0)
The TABnIOC0 register is an 8-bit register that controls the timer output (TOABn0 to TOABn3 pins).
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
TABnOL3
TABnOLm
0
1
TOABnm pin output level setting (m = 0 to 3)
Note
TOABnm pin high level start
TOABnm pin low level start
TABnIOC0
(n = 0, 1)
TABnOE3 TABnOL2 TABnOE2 TABnOL1 TABnOE1 TABnOL0 TABnOE0
654321
After reset: 00H R/W Address:
TAB0IOC0 FFFFF542H, TAB1IOC0 FFFFF562H
TABnOEm
0
1
TOABnm pin output setting (m = 0 to 3)
Timer output disabled
• When TABnOLm bit = 0: Low level is output from the TOABnm pin
• When TABnOLm bit = 1: High level is output from the TOABnm pin
7 0
Timer output enabled (a square wave is output from the TOABnm pin).
Note The output level of the timer output pin (TOABnm) specified by the
TABnOLm bit is shown below.
TABnCE bit
TOABnm output pin
16-bit counter
• When TABnOLm bit = 0
TABnCE bit
TOABnm output pin
16-bit counter
• When TABnOLm bit = 1
Cautions 1. Rewrite the TABnOLm and TABnOEm bits when the
TABnCTL0.TABnCE bit = 0. (The same value can be written
when the TABnCE bit = 1.) If rewriting was mistakenly
performed, clear the TABnCE bit to 0 and then set the bits
again.
2. Even if the TABnOLm bit is manipulated when the TABnCE
and TABnOEm bits are 0, the TOABnm pin output level varies.
Remark m = 0 to 3