Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 8 16-BIT TIMER/EVENT COUNTER AB (TAB)
R01UH0042EJ0500 Rev.5.00 Page 336 of 1513
Aug 12, 2011
(2) TABn control register 1 (TABnCTL1)
The TABnCTL1 register is an 8-bit register that controls the operation of TABn.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
0
TABnEST
0
1
Software trigger control
TABnCTL1
(n = 0, 1)
TABnEST TABnEEE 00 TABnMD2 TABnMD1 TABnMD0
654321
After reset: 00H R/W Address:
TAB0CTL1 FFFFF541H, TAB1CTL1 FFFFF561H
Generate a valid signal for external trigger input.
• In one-shot pulse output mode: A one-shot pulse is output with writing
1 to the TABnEST bit as the trigger.
• In external trigger pulse output mode: A PWM waveform is output with
writing 1 to the TABnEST bit as
the trigger.
7 0
−
Disable operation with external event count input.
(Perform counting with the count clock selected by the
TABnCTL0.TABnCK0 to TABnCTL0.TABnCK2 bits.)
TABnEEE
0
1
Count clock selection
The TABnEEE bit selects whether counting is performed with the internal count
clock or the valid edge of the external event count input.
Interval timer mode
External event count mode
External trigger pulse output mode
One-shot pulse output mode
PWM output mode
Free-running timer mode
Pulse width measurement mode
Triangular wave PWM mode
TABnMD2
0
0
0
0
1
1
1
1
Timer mode selection
TABnMD1
0
0
1
1
0
0
1
1
TABnMD0
0
1
0
1
0
1
0
1
Enable operation with external event count input.
(Perform counting at the valid edge of the external event count input
signal.)
Cautions 1. The TABnEST bit is valid only in the external trigger pulse output mode or
one-shot pulse output mode. In any other mode, writing 1 to this bit is
ignored.
2. Be sure to set bits 3, 4, and 7 to “0”.
3. External event count input is selected in the external event count mode
regardless of the value of the TABnEEE bit.
4. Set the TABnEEE and TABnMD2 to TABnMD0 bits when the
TABnCTL0.TABnCE bit = 0. (The same value can be written when the
TABnCE bit = 1.) The operation is not guaranteed when rewriting is
performed with the TABnCE bit = 1. If rewriting was mistakenly
performed, clear the TABnCE bit to 0 and then set the bits again.