Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 8 16-BIT TIMER/EVENT COUNTER AB (TAB)
R01UH0042EJ0500 Rev.5.00 Page 335 of 1513
Aug 12, 2011
(1) TABn control register 0 (TABnCTL0)
The TABnCTL0 register is an 8-bit register that controls the operation of TABn.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
Software can be used to always write the same value to the TABnCTL0 register.
TABnCE
TABn operation disabled (TABn reset asynchronously
Note
).
TABn operation enabled. TABn operation started.
TABnCE
0
1
TABn operation control
TABnCTL0
(n = 0, 1)
0000
TABnCKS2 TABnCKS1 TABnCKS0
654321
After reset: 00H R/W Address: TAB0CTL0 FFFFF540H, TAB1CTL0 FFFFF560H
7 0
fXX
fXX/2
f
XX/4
f
XX/8
f
XX/16
f
XX/32
f
XX/64
f
XX/128
TABnCKS2
0
0
0
0
1
1
1
1
Internal count clock selection
TABnCKS1
0
0
1
1
0
0
1
1
TABnCKS0
0
1
0
1
0
1
0
1
Note TABnOPT0.TABnOVF bit, 16-bit counter, timer output (TOABn0 to TOABn3 pins)
Cautions 1. Set the TABnCKS2 to TABnCKS0 bits when the TABnCE bit = 0.
When the value of the TABnCE bit is changed from 0 to 1, the
TABnCKS2 to TABnCKS0 bits can be set simultaneously.
2. Be sure to set bits 3 to 6 to “0”.
Remark f
XX: Main clock frequency