Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA)
R01UH0042EJ0500 Rev.5.00 Page 329 of 1513
Aug 12, 2011
7.10 Cautions
(1) Capture operation
When the capture operation is used and a slow clock is selected as the count clock, FFFFH, not 0000H, may be
captured in the TAAnCCR0 and TAAnCCR1 registers if the capture trigger is input immediately after the TAAnCE bit
is set to 1.
(a) Free-running timer mode
Count clock
0000H
FFFFH
TAAnCE bit
TAAnCCR0 register
FFFFH 0001H0000H
TIAAn0 pin input
Capture
trigger input
16-bit counter
Sampling clock (f
XX)
Capture
trigger input
(b) Pulse width measurement mode
0000H
FFFFH
FFFFH 0002H0000H
Count clock
TAAnCE bit
TAAnCCR0 register
TIAAn0 pin input
Capture
trigger input
16-bit counter
Sampling clock (f
XX)
Capture
trigger input