Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA)
R01UH0042EJ0500 Rev.5.00 Page 328 of 1513
Aug 12, 2011
7.9 Selector Function
In the V850ES/JG3-H and V850ES/JH3-H, the alternate-function pins of ports or peripheral I/O (TAA1, TAB0, UARTC0,
or UARTC1) signals can be selected as the capture trigger input of TAA1 and TAB0.
If the signal input from the UARTCn pin is selected by the selector function when RXDCn is used, baud rate errors of
the LIN reception transfer rate of UARTCn can be calculated (n = 0, 1).
(1) Selector operation control register 0 (SELCNT0)
The SELCNT0 register is an 8-bit register that selects the capture trigger for CAN0, TAA1, and TAB0.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
0SELCNT0 0 0 ISEL4 ISEL3 0 0 ISEL0
Note
654321
ISEL4
0
1
Selection of TIAA11 capture trigger input signal
TIAA11 (alternately functions as P35) pin
RXDC1 (alternately functions as P91) pin
ISEL3
0
1
Selection of TIAA10 capture trigger input signal
TIAA10 (alternately functions as P34) pin
RXDC0 (alternately functions as P31) pin
ISEL0
Note
0
1
Selection of TIAB02 capture trigger input signal
TIAB02 (alternately functions as P51) pin
CAN0 TSOUT signal
After reset: 00H R/W Address: FFFFF308H
7 0
Note
μ PD70F3770 and 70F3771 only
Cautions 1. To set the ISEL4, ISEL3, and ISEL0 bits to 1, set the corresponding function pin to
the capture input mode.
2. Set the ISEL4, ISEL3, and ISEL0 bits when the operation of TAA1, TAB0, and
UARTC0, UARTC1, and CAN0 are stopped.
3. Be sure to set bits 7 to 5, 2, and 1 to “0”.