Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA)
R01UH0042EJ0500 Rev.5.00 Page 324 of 1513
Aug 12, 2011
The operation of each pin and signal when TAA1 and TAA0 are connected in cascade is shown below.
Table 7-12. Status in Cascade Connection
Name Higher/Lower Function Operation
TIAA10 pin input Lower Capture input 0
The value of the lower timer counter is stored in the
TAA1CCR0 register and the value of the higher timer
counter is stored in the TAA0CCR0 register when the
valid edge of this input is detected.
TIAA11 pin input Lower Capture input 1
The value of the lower timer counter is stored in the
TAA1CCR1 register and the value of the higher timer
counter is stored in the TAA0CCR1 register when the
valid edge of this input is detected.
INTTAA1CCR0 interrupt signal Lower Capture interrupt 0
This interrupt is generated when the valid edge of the
TIAA10 pin is detected.
INTTAA1CCR1 interrupt signal Lower Capture interrupt 1
This interrupt is generated when the valid edge of the
TIAA11 pin is detected.
INTTAA1OV interrupt signal Lower Overflow interrupt
This interrupt is generated when an overflow of the
lower timer counter is detected.
TIAA00 pin input Higher Capture input 0 Does not operate.
TIAA01 pin input Higher Capture input 1 Does not operate.
INTTAA0CCR0 interrupt signal Higher Capture interrupt 0 Does not operate.
INTTAA0CCR1 interrupt signal Higher Capture interrupt 1 Does not operate.
INTTAA0OV interrupt signal Higher Overflow interrupt
This interrupt is generated when an overflow of the
higher timer counter is detected.