Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA)
R01UH0042EJ0500 Rev.5.00 Page 321 of 1513
Aug 12, 2011
7.7.1 PWM output mode (simultaneous-start operation)
In this section, the operation of the simultaneous-start function is shown, where TAA1 is used as the master timer and
TAA0 is used as the slave timer.
The master timer (TAA1) and slave timer (TAA0) start operating at the same time when the TAA1CTL0.TAA0CE bit of
master timer is set to 1. The slave timer operates by the count clock supplied from the master timer (TAA1). After the
slave timer starts operating, however, the 16-bit counter of the slave timer (TAA0) is not cleared even if the 16-bit counter
of the master timer (TAA1) is cleared to 0000H upon a match between the 16-bit counter value of the master timer (TAA1)
and the TAA1CCR0 register value, because each timer operates individually.
In the same manner, if the compare register value of the master timer (TAA1) is rewritten by batch writing, the compare
register of the slave timer is not affected.
[Initial settings]
Master timer: TAA1CTL0.TAA1CE = 0 (operation disabled)
Slave timer: TAA0CTL0.TAA0CE = 0 (operation disabled)
[Initial settings of master timer (TAA1)]
• TAA1CTL1.TAA1MD2 to TAA1CTL1.TAA1MD0 = 100 (setting of PMW output mode)
• TAA1CTL1.TAA1CKS2 to TAA1CTL1.TAA1CKS0 (setting of count clock (any))
• TAA1CCR1, TAA1CCR0 (specification of valid edge of capture trigger)
• TAA1IOC0 (specification of valid edge of capture trigger)
[Initial settings of slave timer (TAA0)]
• TAA0CTL1.TAA0SYE = 1, TAA0SYM = 1 (simultaneous-start operation)
• TAA0CTL1.TAA0MD2 to TAA0CTL1.TAA0MD0 = 100 (setting of PMW output mode)
• TAA0CCR0, TAA1CCR1 (specification of valid edge of capture trigger)
• TAA0IOC0 (specification of valid edge of capture trigger)
Remark The initial settings of the master timer and slave timer may be performed in any order.
[Starting counting]
<1> Set TAA1CTL0.TAA1CE of the master timer to 1.
<2> Start counting.
<3> Changing the setting of the register during operation
• The compare register can be rewritten (anytime write).
[End condition]
• Set TAA1CTL0.TAA0CE of the master timer to 0.