Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA)
R01UH0042EJ0500 Rev.5.00 Page 319 of 1513
Aug 12, 2011
[Batch write]
In the PWM output mode, the next batch write is enabled by writing the TAB0CCR1 register of the master timer
(TAB0). After all the compare registers that must be rewritten have been rewritten, therefore, the TAB0CCR1
register of the master timer (TAB0) must be written.
Batch writing is executed when the value of the timer counter matches the value of the compare register for cycle
(TAB0CCR0).
If the TAB0CCR1 register of the master timer (TAB0) is not written, batch writing is not enabled even if any other
compare register is rewritten. Consequently, the value of the compare registers is not rewritten even when the
value of the timer counter matches the value of the compare register for cycle (TAB0CCR0).
Figure 7-47. Timing Example of Tuned PWM Function (TAB0, TAA5)
TOAB00 pin output
TOAB01 pin output
TOAB02 pin output
TOAA50 pin output
TOAB03 pin output
TAB0CCR0 register
TAB0CE bit
INTTAB0CC0
match interrupt
TOAA51 pin output
INTTAB0CC1
match interrupt
INTTAB0CC2
match interrupt
INTTAB0CC3
match interrupt
INTTAA5CC0
match interrupt
INTTAA5CC1
match interrupt
FFFFH
0000H
TAB0
16-bit counter
D 00
D 50
D 40
D 30
D 20
D 10
D 00
D 50
D 40
D 30
D 20
D 10
TAB0CCR1 register
TAB0CCR0 register
TAB0CCR1 register
TAA5CCR0 register
TAA5CCR1 register
D 00
D 10
D 20
D 30
D 40
D 50