Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA)
R01UH0042EJ0500 Rev.5.00 Page 311 of 1513
Aug 12, 2011
7.6.1 Free-running timer mode (during timer-tuned operation)
This section explains the free-running timer mode of the timer-tuned operation. For the combination of timer-tuned
operations, see Table 7-7. In this section, an example of timer-tuned operation using TAA1 and TAA0 is shown.
(i) Selecting capture/compare registers
When the free-running timer mode of the timer-tuned operation is used with TAA1 and TAA0 connected to each
other, the two capture/compare registers of TAA1 and two capture/compare registers of TAA0 can be used in
combination.
How the capture and compare registers are combined is not restricted and can be selected by using the
TAAnCCSn bit of the master or slave timer. When the compare register is selected, the set value of the
compare register can be rewritten during operation and the rewriting method is anytime write (n = 0, 1).
(ii) Overflow
If the counter overflows, an overflow interrupt (INTTAA1OV) of the master timer is generated and the overflow
flag (TAA1OVF) is set to “1”.
The overflow interrupt (INTTAA0OV) and overflow flag (TAA0OVF) of the slave timer do not operate and are
always at the low level.