Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA)
R01UH0042EJ0500 Rev.5.00 Page 303 of 1513
Aug 12, 2011
7.5.7 Pulse width measurement mode (TAAnMD2 to TAAnMD0 bits = 110)
In the pulse width measurement mode, 16-bit timer/event counter AA starts counting when the TAAnCTL0.TAAnCE bit
is set to 1. Each time the valid edge input to the TIAAnm pin has been detected, the count value of the 16-bit counter is
stored in the TAAnCCRm register, and the 16-bit counter is cleared to 0000H.
The interval of the valid edge can be measured by reading the TAAnCCRm register after a capture interrupt request
signal (INTTAAnCCm) occurs.
Select either the TIAAn0 or TIAAn1 pin as the capture trigger input pin. Specify “No edge detection” for the unused pins
by using the TAAnIOC1 register.
When an external clock is used as the count clock, measure the pulse width of the TIAAn1 pin because the external
clock is fixed to the TIAAn0 pin. At this time, clear the TAAnIOC1.TAAnIS1 and TAAnIOC1.TAAnIS0 bits to 00 (capture
trigger input (TIAAn0 pin): No edge detection).
Figure 7-39. Configuration in Pulse Width Measurement Mode
TAAnCCR0 register
(capture)
TAAnCE bit
TAAnCCR1 register
(capture)
Count
clock
selection
Edge
detector
Edge
detector
TIAAn1 pin
(capture
trigger input)
TIAAn0 pin
(capture
trigger input)
Clear
INTTAAnOV signal
INTTAAnCC0 signal
INTTAAnCC1 signal
16-bit counter
Remark n = 0 to 3, 5
m = 0, 1