Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA)
R01UH0042EJ0500 Rev.5.00 Page 291 of 1513
Aug 12, 2011
(1) Operation flow in free-running timer mode
(a) When using capture/compare register as compare register
Figure 7-37. Software Processing Flow in Free-Running Timer Mode (Compare Function) (1/2)
FFFFH
16-bit counter
0000H
TAAnCE bit
TAAnCCR0 register
INTTAAnCC0 signal
TOAAn0 pin output
TAAnCCR1 register
INTTAAnCC1 signal
TOAAn1 pin output
INTTAAnOV signal
TAAnOVF bit
D00 D01
D10 D11
D00
D10 D10
D11 D11 D11
D00
D01 D01
Cleared to 0 by
CLR instruction
Set value changed
Cleared to 0 by
CLR instruction
Cleared to 0 by
CLR instruction
<1>
<2> <2> <2>
<3>
Set value changed
Remark n = 0 to 3, 5