Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA)
R01UH0042EJ0500 Rev.5.00 Page 289 of 1513
Aug 12, 2011
Figure 7-36. Register Setting in Free-Running Timer Mode (1/2)
(a) TAAn control register 0 (TAAnCTL0)
0/1 0 0 0 0
TAAnCTL0
Select count clock
Note
0: Stops counting
1: Enables counting
0/1 0/1 0/1
TAAnCKS2 TAAnCKS1 TAAnCKS0 TAAnCE
Note The setting is invalid when the TAAnCTL1.TAAnEEE bit = 1
(b) TAAn control register 1 (TAAnCTL1)
0 0 0/1 0 0
TAAnCTL1
101
TAAnMD2 TAAnMD1 TAAnMD0TAAnEEETAAnEST
1, 0, 1:
Free-running mode
0: Operates with count clock
selected by TAAnCKS0 to
TAAnCKS2 bits
1: Counts on external
event count input signal
(c) TAAn I/O control register 0 (TAAnIOC0)
0 0 0 0 0/1
TAAnIOC0
0: Disables TOAAn0 pin output
1: Enables TOAAn0 pin output
Sets output level with operation
of TOAAn0 pin disabled
0: Low level
1: High level
0: Disables TOAAn1 pin output
1: Enables TOAAn1 pin output
Sets output level with operation
of TOAAn1 pin disabled
0: Low level
1: High level
0/1 0/1 0/1
TAAnOE1 TAAnOL0 TAAnOE0TAAnOL1