Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 1 INTRODUCTION
R01UH0042EJ0500 Rev.5.00 Page 28 of 1513
Aug 12, 2011
1.6 Function Block Configuration
1.6.1 Internal block diagram
• V850ES/JG3-H
DMAC
TOT00, TOT01
TECR0, TENC00, TENC01,
EVTT0, TIT00, TIT01
TOAA00 to TOAA30, TOAA50,
TOAA01 to TOAA31, TOAA51
TIAA00 to TIAA30, TIAA50,
TIAA01 to TIAA31, TIAA51,
TOAA1OFF
NMI
INTP02 to INTP05 ,
INTP07 to INTP18
INTC
Note 1
Note 2
WDT
KR0 to KR7
RAM
PC
ALU
CPU
AD0 to AD15
FLMD0
FLMD1
CG
PLL
ASTB
RD
WAIT
WR0, WR1
PCM1
PCT0, PCT1
PDL0 to PDL15
P90 to P915 P70 to P711
P60 to P65 P50 to P56 P40 to P42 P30 to P37
P10, P11
P02 to P05
AV REF1
ANO0, ANO1
ANI0 to ANI11
ADTRG
AV
REF0
AV SS
CLKOUT
XT1
XT2
X1
X2
RESET
V DD
V SS
REGC
EV DD , UV DD
BCU
SDA00 to SDA02
SCL00 to SCL02
CRXD0
CTXD0
UDMF
UDPF
RXDC0 to RXDC4
TXDC0 to TXDC4
ASCKC0
SIF0 to SIF4
SOF0 to SOF4
SCKF0 to SCKF4
DCU
DRST
DMS
DDI
DCK
DDO
CG
LVI
CLM
CRC
CS0, CS2, CS3
RTP00 to RTP05
RTO
I
2
C0: 3 ch
CAN
Note 3
: 1 ch
USB function
TOAB00 to TOAB03,
TOAB10 to TOAB13
TOAB1T1 to TOAB1T3,
TOAB1B1 to TOAB1B3
TIAB00 to TIAB03,
TIAB10 to TIAB13,
EVTAB1,
TRGAB1,
TOAB1OFF
RTC
CSIF
:
5 ch
UARTC :
5 ch
RTC1HZ
RTCCL
RTCDIV
16-bit timer/
counter AB:
2 ch
32-bit barrel
shifter
16-bit timer/
counter AA:
6 ch
16-bit interval
timer M:
4 ch
16-bit timer/
counter T:
1 ch
Flash memory
System
register
General-purpose
registers 32 bits × 32
Multiplier
16 × 16 → 32
Instruction
queue
Ports
Internal
oscillator
Key return
function
Regulator
A/D
converter
D/A
converter
Notes 1.
μ PD70F3760, 70F3770: 256 KB
μ PD70F3761: 384 KB
μ PD70F3762: 512 KB
2.
μ PD70F3760, 70F3770: 40 KB (Including a data only RAM: 8 KB)
μ PD70F3761: 48 KB (Including a data only RAM: 8 KB)
μ PD70F3762: 56 KB (Including a data only RAM: 8 KB)
3.
μ PD70F3770 only