Datasheet
V850ES/JG3-H, V850ES/JH3-H CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA)
R01UH0042EJ0500 Rev.5.00 Page 259 of 1513
Aug 12, 2011
Figure 7-22. Basic Timing in External Trigger Pulse Output Mode
FFFFH
16-bit counter
0000H
TAAnCE bit
TAAnCCR0 register
INTTAAnCC0 signal
TAAnCCR1 register
INTTAAnCC1 signal
TOAAn1 pin output
External trigger input
(TIAAn0 pin input)
TOAAn0 pin output
(only when software
trigger is used)
D
1
D
0
D
0
D
1
D
1
D
1
D
1
D
0
D
0
D
0
Wait
for
trigger
Active level
width (D
1
)
Cycle (D
0
+ 1) Cycle (D
0
+ 1) Cycle (D
0
+ 1)
Active level
width (D
1
)
Active level
width (D
1
)
16-bit timer/event counter AA waits for a trigger when the TAAnCE bit is set to 1. When the trigger is generated, the 16-
bit counter is cleared from FFFFH to 0000H, starts counting at the same time, and outputs a PWM waveform from the
TOAAn1 pin. If the trigger is generated again while the counter is operating, the counter is cleared to 0000H and restarted.
(The output of the TOAAn0 pin is inverted. The TOAAn1 pin outputs a high level regardless of the status (high/low) when a
trigger occurs.)
The active level width, cycle, and duty factor of the PWM waveform can be calculated as follows.
Active level width = (Set value of TAAnCCR1 register) × Count clock cycle
Cycle = (Set value of TAAnCCR0 register + 1) × Count clock cycle
Duty factor = (Set value of TAAnCCR1 register)/(Set value of TAAnCCR0 register + 1)
The compare match request signal INTTAAnCC0 is generated the next time the 16-bit counter counts after its count
value matches the value of the CCR0 buffer register, and the 16-bit counter is cleared to 0000H at the same time. The
compare match interrupt request signal INTTAAnCC1 is generated when the count value of the 16-bit counter matches the
value of the CCR1 buffer register.
The value set to the TAAnCCRm register is transferred to the CCRm buffer register when the count value of the 16-bit
counter matches the value of the CCRm buffer register and the 16-bit counter is cleared to 0000H.
The valid edge of an external trigger input signal, or setting the software trigger (TAAnCTL1.TAAnEST bit) to 1 is used
as the trigger.
Remark n = 0 to 3, 5
m = 0, 1