Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA)
R01UH0042EJ0500 Rev.5.00 Page 258 of 1513
Aug 12, 2011
7.5.3 External trigger pulse output mode (TAAnMD2 to TAAnMD0 bits = 010)
In the external trigger pulse output mode, 16-bit timer/event counter AA waits for a trigger when the TAAnCTL0.TAAnCE
bit is set to 1. When the valid edge of an external trigger input signal is detected, 16-bit timer/event counter AA starts
counting, and outputs a PWM waveform from the TOAAn1 pin.
Pulses can also be output by generating a software trigger instead of using the external trigger. When using a software
trigger, a square wave that has one cycle of the PWM waveform as half its cycle can also be output from the TOAAn0 pin.
Figure 7-21. Configuration in External Trigger Pulse Output Mode
CCR0 buffer register
TAAnCE bit
TAAnCCR0 register
16-bit counter
TAAnCCR1 register
CCR1 buffer register
Clear
Match signal
Match signal
INTTAAnCC0 signal
Output
controller
(RS-FF)
Output
controller
TOAAn1 pin
INTTAAnCC1 signal
TOAAn0 pin
Count
clock
selection
Count
start
control
Edge
detector
Software trigger
generation
TIAAn0 pin
Transfer
Transfer
S
R
Remark n = 0 to 3, 5