Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA)
R01UH0042EJ0500 Rev.5.00 Page 256 of 1513
Aug 12, 2011
(c) Operation of TAAnCCR1 register
Figure 7-18. Configuration of TAAnCCR1 Register
CCR0 buffer registerTAAnCE bit
TAAnCCR0 register
16-bit counter
TAAnCCR1 register
CCR1 buffer register
Clear
Match signal
Match signal
INTTAAnCC0 signal
INTTAAnCC1 signal
Edge
detector
TIAAn0 pin
Remark n = 0 to 3, 5
If the set value of the TAAnCCR1 register is smaller than the set value of the TAAnCCR0 register, the
INTTAAnCC1 signal is generated once per cycle.
Figure 7-19. Timing Chart When D
01 ≥ D11
FFFFH
16-bit counter
0000H
TAAnCE bit
TAAnCCR0 register
INTTAAnCC0 signal
TAAnCCR1 register
INTTAAnCC1 signal
D 01
D 11
D 01
D 11 D 11 D 11 D 11
D 01 D 01 D 01
Remark n = 0 to 3, 5