Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA)
R01UH0042EJ0500 Rev.5.00 Page 253 of 1513
Aug 12, 2011
(1) External event count mode operation flow
Figure 7-17. Flow of Software Processing in External Event Count Mode
FFFFH
16-bit counter
0000H
TAAnCE bit
TAAnCCR0 register
INTTAAnCC0 signal
D0
D0 D0 D0
<1> <2>
TAAnCE bit = 1
TAAnCE bit = 0
Register initial setting
TAAnCTL0 register
(TAAnCKS0 to TAAnCKS2 bits),
TAAnCTL1 register,
TAAnIOC0 register,
TAAnIOC2 register,
TAAnCCR0 register
Initial setting of these registers
is performed before setting the
TAAnCE bit to 1.
The TAAnCKS0 to TAAnCKS2 bits can
be set at the same time when counting
has been started (TAAnCE bit = 1).
The counter is initialized and counting
is stopped by clearing the TAAnCE bit to 0.
START
STOP
<1> Count operation start flow
<2> Count operation stop flow
Remark n = 0 to 3, 5