Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA)
R01UH0042EJ0500 Rev.5.00 Page 252 of 1513
Aug 12, 2011
Figure 7-16. Register Setting for Operation in External Event Count Mode (2/2)
(e) TAAn counter read buffer register (TAAnCNT)
The count value of the 16-bit counter can be read by reading the TAAnCNT register.
(f) TAAn capture/compare register 0 (TAAnCCR0)
If D
0 is set to the TAAnCCR0 register, the counter is cleared and a compare match interrupt
request signal (INTTAAnCC0) is generated when the number of external event counts reaches
(D
0 + 1).
(g) TAAn capture/compare register 1 (TAAnCCR1)
Usually, the TAAnCCR1 register is not used in the external event count mode. However, the set
value of the TAAnCCR1 register is transferred to the CCR1 buffer register. When the count value
of the 16-bit counter matches the value of the CCR1 buffer register, a compare match interrupt
request signal (INTTAAnCC1) is generated.
Therefore, mask the interrupt signal by using the interrupt mask flag (TAAnCCMK1).
Caution When an external clock is used as the count clock, the external clock can be input only from
the TIAAn0 pin. At this time, set the TAAnIOC1.TAAnIS1 and TAAnIOC1.TAAnIS0 bits to 00
(capture trigger input (TIAAn0 pin): no edge detection).
Remarks 1. TAAn I/O control register 1 (TAAnIOC1) and TAAn option register 0 (TAAnOPT0) are
not used in the external event count mode.
2. n = 0 to 3, 5