Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA)
R01UH0042EJ0500 Rev.5.00 Page 244 of 1513
Aug 12, 2011
(2) Interval timer mode operation timing
(a) Operation if TAAnCCR0 register is set to 0000H
If the TAAnCCR0 register is set to 0000H, the INTTAAnCC0 signal is generated at each count clock
subsequent to the first count clock, and the output of the TOAAm0 pin is inverted.
The value of the 16-bit counter is always 0000H.
Count clock
16-bit counter
TAAnCE bit
TAAnCCR0 register
TOAAm0 pin output
INTTAAnCC0 signal
0000H
Interval time
Count clock cycle
Interval time
Count clock cycle
FFFFH 0000H 0000H 0000H 0000H
Remark m = 0 to 3, 5
n = 0 to 5