Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA)
R01UH0042EJ0500 Rev.5.00 Page 239 of 1513
Aug 12, 2011
Figure 7-6. Timing of Batch Write (Interval Timer Mode of TAA0)
D
01
D
01
D
02
D
03
0000H D
01
D
11
D
12
D
12
0000H D
11
TAA0CE bit = 1
Note 1
D
02
D
02
D
03
D
11
D
12
D
12
D
12
D
12
16-bit counter
TAA0CCR0 register
TAA0CCR1 register
INTTAA0CC0 signal
INTTAA0CC1 signal
TOAA01 pin output
TOAA00 pin output
CCR0 buffer register
CCR1 buffer register
Note 1
Note 1
Note 1
Same value write
D
02
D
12
0000H
D
03
D
12
Note 2 Note 3
FFFFH
Notes 1. Because the TAA0CCR1 register was not rewritten, D
03 is not transferred.
2. Because the TAA0CCR1 register has been written (D
12), data is transferred to the CCR1
buffer register upon a match between the value of the 16-bit counter and the value of the
TAA0CCR0 register (D
01).
3. Because the TAA0CCR1 register has been written (D
12), data is transferred to the CCR1
buffer register upon a match between the value of the 16-bit counter and the value of the
TAA0CCR0 register (D
02).
Remark D
01, D02, D03: Set values of TAA0CCR0 register
D
11, D12: Set values of TAA0CCR1 register