Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA)
R01UH0042EJ0500 Rev.5.00 Page 223 of 1513
Aug 12, 2011
(5) TAAn I/O control register 2 (TAAnIOC2)
The TAAnIOC2 register is an 8-bit register that controls the valid edge of the external event count input signal
(TIAAn0 pin) and external trigger input signal (TIAAn0 pin).
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
0
TAAnEES1
0
0
1
1
TAAnEES0
0
1
0
1
External event count input signal (TIAAn0 pin) valid edge setting
No edge detection (external event count invalid)
Detection of rising edge
Detection of falling edge
Detection of both edges
TAAnIOC2
(n = 0 to 3, 5)
000
TAAnEES1 TAAnEES0 TAAnETS1 TAAnETS0
654321
After reset: 00H R/W Address: TAA0IOC2 FFFFF634H, TAA1IOC2 FFFFF644H,
TAA2IOC2 FFFFF654H, TAA3IOC2 FFFFF664H.
TAA5IOC2 FFFFF684H
TAAnETS1
0
0
1
1
TAAnETS0
0
1
0
1
External trigger input signal (TIAAn0 pin) valid edge setting
No edge detection (external trigger invalid)
Detection of rising edge
Detection of falling edge
Detection of both edges
7 0
Cautions 1. Rewrite the TAAnEES1, TAAnEES0, TAAnETS1, and
TAAnETS0 bits when the TAAnCTL0.TAAnCE bit = 0. (The
same value can be written when the TAAnCE bit = 1.) If
rewriting was mistakenly performed, clear the TAAnCE bit
to 0 and then set the bits again.
2. The TAAnEES1 and TAAnEES0 bits are valid only when
the TAAnCTL1.TAAnEEE bit = 1 or when the external
event count mode (TAAnCTL1.TAAnMD2 to
TAAnCTL1.TAAnMD0 bits = 001) has been set.
3. The TAAnETS1 and TAAnETS0 bits are valid only when
the external trigger pulse output mode
(TAAnCTL1.TAAnMD2 to TAAnCTL1.TAAnMD0 bits = 010)
or the one-shot pulse output mode (TAAnCTL1.TAAnMD2
to TAAnCTL1.TAAnMD0 = 011) is set.