Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA)
R01UH0042EJ0500 Rev.5.00 Page 218 of 1513
Aug 12, 2011
(1) TAAn control register 0 (TAAnCTL0)
The TAAnCTL0 register is an 8-bit register that controls the operation of TAAn.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
The same value can always be written to the TAAnCTL0 register by software.
TAAnCE
TAAn operation disabled (TAAn reset asynchronously
Note
).
TAAn operation enabled. TAAn operation started.
TAAnCE
0
1
TAAn operation control
TAAnCTL0
(n = 0 to 5)
0000
TAAnCKS2 TAAnCKS1 TAAnCKS0
654321
After reset: 00H R/W Address: TAA0CTL0 FFFFF630H, TAA1CTL0 FFFFF640H,
TAA2CTL0 FFFFF650H, TAA3CTL0 FFFFF660H,
TAA4CTL0 FFFFF670H, TAA5CTL0 FFFFF680H
7
0
f XX
f XX /2
f
XX /4
f
XX /8
f
XX /16
f
XX /32
f
XX /64
f
XX /128
(20.8 ns)
(41.7 ns)
(83.3 ns)
(166.7 ns)
(333.3 ns)
(666.7 ns)
(1.3333 s)
(2.6667 s)
f
XX /2
f
XX /4
f
XX /8
f
XX /16
f
XX /64
f
XX /256
f
XX /512
f
XX /1024
(41.7 ns)
(83.3 ns)
(166.7 ns)
(333.3 ns)
(1.3333 s)
(5.3333 s)
(10.6667 s)
(21.3333 s)
TAAnCKS2
0
0
0
0
1
1
1
1
Internal count clock selection
n = 0, 1, 4 n = 2, 3, 5
TAAnCKS1
0
0
1
1
0
0
1
1
TAAnCKS0
0
1
0
1
0
1
0
1
μμ
μ
μ
μμ
Note TAAnOPT0.TAAnOVF bit, 16-bit counter, timer output (TOAAn0, TOAAn1 pins)
Cautions 1. Set the TAAnCKS2 to TAAnCKS0 bits when the TAAnCE bit = 0.
When the value of the TAAnCE bit is changed from 0 to 1, the
TAAnCKS2 to TAAnCKS0 bits can be set simultaneously.
2. Be sure to set bits 3 to 6 to “0”.
Remark f
XX: Main clock frequency
The values in parentheses indicate the cycles when fXX = 48 MHz.