Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA)
R01UH0042EJ0500 Rev.5.00 Page 214 of 1513
Aug 12, 2011
7.3 Configuration
TAAn includes the following hardware.
Table 7-1. Configuration of TAAn
Item Configuration
Registers 16-bit counter
TAAn capture/compare registers 0, 1 (TAAnCCR0, TAAnCCR1)
TAAn counter read buffer register (TAAnCNT)
CCR0, CCR1 buffer registers
TAAn control registers 0, 1 (TAAnCTL0, TAAnCTL1)
TAAm I/O control registers 0 to 2, 4 (TAAmIOC0 to TAAmIOC2, TAAmIOC4)
TAAm option registers 0, 1 (TAAmOPT0, TAAmOPT1)
TAA noise elimination control register (TANFC)
Timer inputs
Note 1
2 (TIAAm0
Note 2
, TIAAm1 pins)
Timer outputs
Note 1
2 (TOAAm0, TOAAm1 pins)
Notes 1. When using the functions of the TIAAm0, TIAAm1, TOAAm0, and TOAAm1 pins, see Table 4-20
Using Port Pin as Alternate-Function Pin.
2. The TIAAm0 pin functions alternately as a capture trigger input signal, external event count input
signal, and external trigger input signal.
Remark n = 0 to 5, m = 0 to 3, 5
Figure 7-1. Block Diagram of TAAn
Selector
Internal bus
Internal bus
Selector
Edge
detector
CCR0
buffer
register
CCR1
buffer
register
TAAnCCR0
TAAnCCR1
16-bit counter
TAAnCNT
INTTAAnOV
INTTAAnCC0
INTTAAnCC1
Output
controller
Clear
TOAAm0
TOAAm1
f XX
f XX /2
f XX /4
f XX /8
f XX /16
f XX /32
f XX /64
f XX /128
TIAAm0
TIAAm1
Note
Note TAA2, TAA3, TAA5: f
XX/2, fXX/4, fXX/8, fXX/16, fXX/64, fXX/256, fXX/512, fXX/1024.
Remark f
XX: Main clock frequency
n = 0 to 5, m = 0 to 3, 5