Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 4 PORT FUNCTIONS

R01UH0042EJ0500 Rev.5.00 Page 173 of 1513

Aug 12, 2011

The setting procedure that may cause malfunction on switching from the P41 pin to the SCL01 pin

is shown below.

Setting Procedure Setting Contents Pin State Pin Level

<1>

Initial value

(PMC41 bit = 0,

PFC41 bit = 0,

PF41 bit = 0)

Port mode (input) Hi-Z

<2> PMC41 bit ← 1 SOF0 output

Low level (high level depending on the

CSIF0 setting)

<3> PFC41 bit ← 1 SCL01 I/O High level (CMOS output)

<4> PF41 bit ← 1 SCL01 I/O Hi-Z (N-ch open-drain output)

In <2>, I

C communication may be affected since the alternate-function SOF0 output is output to the

pin. In the CMOS output period of <2> or <3>, unnecessary current may be generated.

(b) Cautions on alternate-function mode (input)

The signal input to the alternate-function block is low level when the PMCn.PMCnm bit is 0 due to the AND

output of the PMCn register set value and the pin level. Thus, depending on the port setting and alternate-

function operation enable timing, unexpected operations may occur. Therefore, switch between the port mode

and alternate-function mode in the following sequence.

• To switch from port mode to alternate-function mode (input)

Set the pins to the alternate-function mode using the PMCn register and then enable the alternate-function

operation.

• To switch from alternate-function mode (input) to port mode

Stop the alternate-function operation and then switch the pins to the port mode.

Concrete examples are shown in [Example 1] and [Example 2].

[Example 1] Switching from general-purpose port (P02) to external interrupt pin (NMI)

When the P02/NMI pin is pulled up as shown in Figure 4-4 and the rising edge is specified by the

NMI pin edge detection setting, even though a high level is input continuously to the NMI pin

when switching from the P02 pin to the an NMI pin (PMC02 bit = 0 → 1), this is detected as a

rising edge as if a low level changed to a high level, and an NMI interrupt occurs.

To avoid this, set the NMI pin’s valid edge after switching from the P02 pin to the NMI pin.