Datasheet

R01UH0042EJ0500 Rev.5.00 Page 171 of 1513
Aug 12, 2011
V850ES/JG3-H, V850ES/JH3-H CHAPTER 4 PORT FUNCTIONS
Table 4-20. Using Port Pin as Alternate-Function Pin (10/10)
Alternate Function Pin Name
Name I/O
Pnx Bit of
Pn Register
PMnx Bit of
PMn Register
PMCnx Bit of
PMCn Register
PFCEnx Bit of
PFCEn Register
PFCnx Bit of
PFCn Register
Other Bits
(Registers)
AD5 I/O
PDL5 = Setting not required
PMDL5 = Setting not required
PMCDL5 = 1 PDL5
FLMD1
Note
Input
PDL5 = Setting not required
PMDL5 = Setting not required PMCDL5 = Setting not required
PDL6 AD6 I/O
PDL6 = Setting not required
PMDL6 = Setting not required
PMCDL6 = 1
PDL7 AD7 I/O
PDL7 = Setting not required
PMDL7 = Setting not required
PMCDL7 = 1
PDL8 AD8 I/O
PDL8 = Setting not required
PMDL8 = Setting not required
PMCDL8 = 1
PDL9 AD9 I/O
PDL9 = Setting not required
PMDL9 = Setting not required
PMCDL9 = 1
PDL10 AD10 I/O
PDL10 = Setting not required
PMDL10 = Setting not required
PMCDL10 = 1
PDL11 AD11 I/O
PDL11 = Setting not required
PMDL11 = Setting not required
PMCDL11 = 1
PDL12 AD12 I/O
PDL12 = Setting not required
PMDL12 = Setting not required
PMCDL12 = 1
PDL13 AD13 I/O
PDL13 = Setting not required
PMDL13 = Setting not required
PMCDL13 = 1
PDL14 AD14 I/O
PDL14 = Setting not required
PMDL14 = Setting not required
PMCDL14 = 1
PDL15 AD15 I/O
PDL15 = Setting not required
PMDL15 = Setting not required
PMCDL15 = 1
Note Since this pin is set in the flash memory programming mode, it does not need to be manipulated using the port control register. For details, see CHAPTER 31
FLASH MEMORY.