Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 4 PORT FUNCTIONS
R01UH0042EJ0500 Rev.5.00 Page 161 of 1513
Aug 12, 2011
(3) Port DL mode control register (PMCDL)
I/O port
ADn I/O (address/data bus I/O)
PMCDLn
0
1
Specification of PDLn pin operation mode (n = 0 to 15)
PMCDL7 PMCDL6 PMCDL5 PMCDL4 PMCDL3 PMCDL2 PMCDL1 PMCDL0
PMCDL15 PMCDL14PMCDL13 PMCDL12 PMCDL11PMCDL10 PMCDL9 PMCDL8
89101112131415
PMCDL (PMCDLH)
(PMCDLL)
After reset: 0000H R/W Address:
PMCDL FFFFF044H,
PMCDLL FFFFF044H, PMCDLH FFFFF045H
Remarks 1. The PMCDL register can be read or written in 16-bit units.
However, when using the higher 8 bits of the PMCDL register as the PMCDLH
register and the lower 8 bits as the PMCDLL register, they can be read or written in
8-bit or 1-bit units.
2. To read/write bits 8 to 15 of the PMCDL register in 8-bit or 1-bit units, specify them
as bits 0 to 7 of the PMCDLH register.
4.4 Port Register Settings When Alternate Function Is Used
Table 4-20 shows the port register settings when each port is used for an alternate function. When using a port pin as
an alternate-function pin, refer to the description of each pin.