Datasheet
V850ES/JG3-H, V850ES/JH3-H APPENDIX E REVISION HISTORY
R01UH0042EJ0500 Rev.5.00 Page 1509 of 1513
Aug 12, 2011
(3/4)
Edition Description Chapter
Modification of 3.4.4 (2) (d) Data-only RAM (8 KB)
Addition of Caution to 3.4.4 (2) (d) Data-only RAM (8 KB)
Modification of Figure 3-10. Data only RAM (8 KB)
Modification of 3.4.4 (4) External memory area
Modification of 3.4.6 Peripheral I/O registers
CHAPTER 3
CPU FUNCTION
Modification of Figure 7-23. (d) TAAn I/O control register 2 (TAAnIOC2)
Modification of Figure 7-27. (d) TAAn I/O control register 2 (TAAnIOC2)
Modification of 7.8 Cascade Connection
CHAPTER 7
16-BIT TIMER/EVENT
COUNTER AA (TAA)
Modification of Table 12-1 Configuration of Real-Time Counter
Modification of Figure 12-1. Block Diagram of Real-Time Counter
Addition of 12.3 (17) Prescaler mode register 0 (PRSM0)
Addition of 12.3 (18) Prescaler compare register 0 (PRSCM0)
CHAPTER 12
REAL-TIME COUNTER
Addition of Note 2 to 18.4 (2) CSIFn control register 1 (CFnCTL1)
CHAPTER 18
3-WIRE VARIABLE-LENGTH
SERIAL I/O (CSIF)
Modification of Table 19-4. Extension Code Bit Definitions
Modification of Figure 19-23. Example of Master to Slave Communication (When 9-
Clock Wait Is Selected for Both Master and Slave)
Modification of Figure 19-24. Example of Slave to Master Communication (When 8-
Clock Wait for Master and 9-Clock Wait for Slave Are Selected)
CHAPTER 19
I2C BUS
Modification of Figure 21-1. Block Diagram of USB Function Controller
CHAPTER 21
USB FUNCTION
CONTROLLER (USBF)
Addition of 22.3 (7) External DMA request enable register (EXDRQEN)
CHAPTER 22
DMA FUNCTION (DMA
CONTROLLER)
Modification of Table 25-10. Operating Status in Subclock Operation Mode
CHAPTER 25 STANDBY
FUNCTION
Modification of Figure 28-1. Block Diagram of Low-Voltage Detector
CHAPTER 28
LOW-VOLTAGE DETECTOR
(LVI)
Modification of 33.5.1 I/O level
Modification of 33.7.2 (1) (a) Read/write cycle (CLKOUT asynchronous)
Modification of 33.7.2 (1) (b) Read/write cycle (CLKOUT synchronous): In multiplexed
bus mode/separate bus mode
Modification of 33.7.2 (2) (a) CLKOUT asynchronous
33.7.2 (2) (b) CLKOUT synchronous
Modification of 33.7.2 (6) (a) Master mode
Modification of 33.7.2 (6) (b) Slave mode
Modification of 33.8 (10) A/D converter
CHAPTER 33 ELECTRICAL
SPECIFICATIONS
2nd
Addition of APPENDIX E REVISION HISTORY
APPENDIX E REVISION
HISTORY